ARM releases Cortex-X3 (+25% peak performance) and Cortex-A715 (+20% efficiency)


The Cortex-X3 and A715, which are the second generation of ARMv9 CPU cores, have just been introduced by the parent firm. Additionally, the little A510 core had a minor improvement. Increased performance, better efficiency, and new, more potent configurations will all be made possible by the new architecture.

Starting with the Cortex-X3, please. This is the third consecutive year of double-digit IPC growth, according to ARM (Instructions Per Cycle, i.e. how much the CPU can do at a set clock speed). The X-core is geared for maximum performance, just like its forerunners.

The new core will provide a 25% performance increase over the top Android chipsets available today (which employ the Cortex-X2) (a mean of the improvements shown on Geekbench 5 and two SPECint tests). The anticipated benefits will be 34% for Windows on ARM architectures, which trail behind smartphone chips significantly.


Notably, ARM has changed the underlying hardware to enable the usage of more CPU cores in performance-oriented chipsets; this improvement is per-core.

ARM has completed its transition away from 32-bit processors with the new Cortex-A715 core (as far as smartphones are concerned). The technical team was able to reduce the hardware for the instruction decoder by a factor of 4. ARM had additional time to work on and enhance the X3 design to better meet the ARMv9 instruction set, even though the X2 was already a 64-bit only core (which the company says is more predictable and regular than ARMv8).

Going back to the A715, it uses 20% less power while maintaining the same performance as the A710. Alternatively, it can provide 5% better performance while using the same amount of electricity (this is assuming the cores are fabbed on the same node).


There is no new tiny core, but by making a few changes, ARM was able to increase the Cortex-power A510’s efficiency by 5% over its 2021 iteration.

Zooming out from the core level, let’s examine the entire chipset. The DynamIQ Shared Unit technology from ARM has been modified to support up to 12-core CPUs with 16MB of L3 cache. Also, take note of the design’s composition: the most potent models will have no less than 8 Cortex-X3 and 4 Cortex-A715 cores.

The existing flagship chips’ 1+3+4 and 1+4+4 and 2+2+4 designs will still be viable options. Clients of ARM (Qualcomm, Samsung, and MediaTek) will be able to develop chips that completely suit a specific performance and power envelop as a result.


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